AS7C34098A-12TIN

AS7C34098A-12TIN is a high-performance CMOS 4,194,304-bit static random access memory (SRAM) device organized as 262,144 words × 16bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired. A read cycle is accomplished by asserting output enable (active-low OE) and chip enable (active-low CE), with write enable (active-low WE) high. The chip drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is active, output drivers stay in high-impedance mode. The device provides multiple centre power and ground pins, and separate byte enable controls, allowing individual bytes to be written and read. Active-low LB controls the lower bits, I/O1–I/O8, and active-low UB controls the higher bits, I/O9–I/O16.

• Pin compatible with AS7C34098
• Centre power and ground pins, high speed
• Low power consumption, 650mW/max at 10ns active, 28.8mW/max CMOS standby
• Individual byte read/write controls
• Easy memory expansion with active-low CE, active-low OE inputs
• TTL- and CMOS-compatible, three-state I/O
• ESD protection ≥ 2000volts
• Latch-up current ≥ 200mA
• 12ns access time, TSOP 2 package
• Industrial temperature range from -40°C to 85°C