SN74LVC1G17DRLR

The SN74LVC1G17DRLR is a single Schmitt-trigger Buffer is designed for 1.65 to 5.5V VCC operation. It contains one buffer and performs the boolean function Y = A. The CMOS device has high output drive while maintaining low static power dissipation over a broad Vcc operating range. The device functions as an independent buffer, but because of Schmitt action, it will have different input threshold levels for a positive-going (VT+) and negative-going signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Ioff Supports live insertion, partial-power-down mode and back-drive protection
• Latch-up performance exceeds 100mA per JESD 78, class II
• Maximum tpd of 4.6ns at 3.3V
• 10μA Maximum low power consumption
• ±24mA Output drive at 3.3V
• Green product and no Sb/Br