MAX9174EUB+T

MAX9174EUB+T is a 670MHz, low-jitter, low-skew 1:2 splitter ideal for protection switching, loopback, and clock and signal distribution. This device features ultra-low 1.0ps(RMS) random jitter (max) that ensures reliable operation in high-speed links that are highly sensitive to timing errors. It has a fail-safe LVDS input and LVDS outputs. The outputs can be put into high impedance using the power-down inputs. It features a fail-safe circuit that drives the outputs high when the input is open, undriven and shorted, or undriven and terminated. The power-down inputs are compatible with standard LVTTL/LVCMOS logic. It is used in applications such as protection switching, loopback, clock distribution.

• 3.3V supply, LVDS fail-safe inputs, IEC 61000-4-2 Level 4 ESD rating
• Power-down inputs tolerate -1.0V and VCC + 1.0V
• Low-power CMOS design, conform to ANSI TIA/EIA-644 LVDS standard
• Differential input current is +20µA maximum at (VCC = +3.0V to +3.6V, RL = 100 ohm ±1%)
• Fail-safe input resistor is 108Kohm maximum at (VCC = 3.6V, 0V or open)
• Input capacitance is 4.5pF maximum at (IN+ or IN- to GND)
• Supply current is 17mA typical at (VCC = +3.0V to +3.6V, RL = 100 ohm ±1%)
• Power-down supply current is 0.5µA typical at (VCC = +3.0V to +3.6V, RL = 100 ohm ±1%)
• High-to-low propagation delay is 2.38ns typical at (VCC = +3.0V to +3.6V)
• Operating temperature range from -40°C to +85°C, 10 µMAX package

Avertissements

La forte demande du marché pour ce produit, entraîné une augmentation des délais. Les dates de livraison peuvent varier. Produit exempt de remises.

Remarques

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